Automotive-grade 12-bit pipelined ADC at 80 MSPS
The MCP37D11-80E/TE is a 12-bit pipelined ADC from Microchip Technology, sampling at 80 MSPS with a differential input and an internal multiplexer that handles up to 8 single-ended or differential channels. The pipelined architecture delivers the throughput needed for radar front-ends, motor-phase current sensing, and battery-monitoring systems where the input frequency can exceed several megahertz. The 1.14 V to 1.26 V analog and digital core supplies keep the power dissipation low enough that the 121-TFBGA package can be routed on a standard 4-layer automotive PCB without a dedicated heatsink.
80 MSPS sampling and the input bandwidth ceiling
At 80 MSPS the Nyquist frequency is 40 MHz — the ADC can digitise input signals up to that fundamental without aliasing, though the effective resolution (ENOB) rolls off above a few megahertz due to the pipelined converter's aperture jitter and comparator ambiguity. For a 10 MHz input the ENOB typically stays above 10.5 bits; above 30 MHz the SNR drops enough that a higher-speed ADC or an external down-conversion stage may be warranted. The SPI data interface allows the conversion results to be read by a standard MCU or FPGA without a parallel bus — the serial clock rate must be at least 12× the sample rate to stream all 12 bits per channel before the next conversion completes.
Active lifecycle and compliance posture
No minimum order quantity is imposed beyond the tray packaging increment.
Package and board-fit considerations
The exposed centre pad (if present) should be connected to the analog ground plane with at least 9 thermal vias to keep the junction temperature below the 125°C limit under continuous 80 MSPS operation. The SPI lines should be kept under 50 mm trace length to avoid reflections at the 20 MHz+ serial clock rate needed to read out all channels. The differential input pair requires a 10 Ω to 50 Ω series resistor at the ADC input pin to damp the sampling glitch energy — the datasheet layout note will specify the exact value based on the source impedance. The internal MUX switches between channels in 1:1 S/H:ADC ratio, meaning the sample-and-hold captures the selected channel before conversion starts; channel-to-channel crosstalk is typically below -80 dB at 1 MHz.