Ethernet PHY selection for MII and RMII MACs
The LAN8700IC-AEZG is a full-duplex Ethernet transceiver from Microchip, designed to connect a MAC controller to the physical twisted-pair or fiber medium. It supports both MII and RMII interfaces, giving the system architect flexibility to trade pin count against throughput — RMII uses half the data lines, freeing GPIOs on the MAC side. The supply voltage range of 3V to 3.6V lets it run from a single 3.3V rail without a separate regulator for the core, simplifying the power tree.
Housed in a 36-VFQFN with exposed pad (6x6 mm), the LAN8700IC-AEZG requires a thermal land pattern on the PCB to sink heat from the PHY's analog front-end. Surface-mount assembly with a tray carrier — no tape-and-reel, so plan for pick-and-place nozzle changeover if your line is reel-only. The 0.5 mm pitch QFN demands a solder-paste stencil aperture that matches the pad dimensions in the datasheet footprint drawing.
This is a current catalog part, not a legacy or NRND device, so long-term BOM stability is assured without a forced redesign. ROHS3 compliant, no exemption conflicts for EU or California market shipments.