Single-port 10/100 PHY with MII and RMII
The KSZ8041FTL is a single-port 10/100Base-TX Ethernet physical-layer transceiver from Microchip. It supports both MII and RMII MAC-side interfaces, giving the designer flexibility to match the host controller's bus without a glue-logic buffer. Full-duplex operation on a single twisted pair or fibre pair, with one driver and one receiver channel integrated.
Operates from a 3.135V to 3.465V supply — a tight 3.3V ±5% window. The regulator feeding this rail must stay within that band under load; a standard 3.3V LDO with ±2% tolerance works, but a switcher with high ripple may push the PHY out of spec. Not qualified for industrial enclosures, outdoor cabinets, or under-hood environments. If the design pushes past 70°C junction, look at the industrial-temperature sibling in the same family.
Housed in a 48-TQFP (7x7mm) with 0.5mm pitch. The inner rows of the QFP require at least a 4-layer PCB for clean breakout — two-layer boards can only route the outer perimeter pins. Plan for microvias or blind vias if board real estate is tight. Confirm the packing preference when ordering to avoid unexpected handling costs.
Microchip continues to manufacture this part, so no last-time-buy math is required for new designs. ROHS3 compliant, lead-free. No known PCN for package or die revision at this time.