Dual-frequency MEMS XO for space-constrained clock trees
The DSC6121JI2A-00AHT: The MEMS die handles the fundamental resonance; the CMOS output stage drives the 50 MHz and 100 MHz rails directly.
Supply flexibility and timing margin
Typical current draw is 3 mA — low enough that the oscillator's power budget is rarely the constraint in a mixed-signal design. For a 100 MHz clock, that translates to a maximum frequency error of ±2.5 kHz — tight enough for most MCU and FPGA reference inputs that do not require a TCXO or OCXO.
Obsolete — sourcing through independent channels
No official successor order code is recorded; the part is no longer available through the factory's standard distribution pipeline. For existing BOM lines that require this exact order code, supply is available through independent surplus and broker channels.