16.6666 MHz, CMOS, and wide supply tolerance
The DSC6101ML3B-016.6666T: Outputs a 16.6666 MHz CMOS clock from a MEMS resonator — the CMOS rail-to-rail swing interfaces directly with digital logic (MCU, FPGA, SoC clock inputs) without external level translation.
4-VFLGA footprint and Enable/Disable function
Includes an Enable/Disable pin — pulling it low tristates the output, allowing the clock to be gated for power-saving modes without removing supply voltage.
