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Microchip Technology DSC400-4444Q0023KE2T — Crystals & Oscillators

DSC400-4444Q0023KE2T MEMS XO – 100 MHz & 156.25 MHz HCSL

MPNDSC400-4444Q0023KE2T
Active

Microchip DSC400 series MEMS XO (Standard), dual-output 100 MHz and 156.25 MHz, HCSL, ±25 ppm stability, 2.25-3.6V supply, enable/disable, 20-VFQFN exposed pad, -20°C~70°C.

Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

DSC400-4444Q0023KE2T specifications
ParameterValue
TypeXO (Standard)
SeriesDSC400
Voltage2.25V ~ 3.6V
Frequency stability±25ppm
Frequency - output 1100MHz
Frequency - output 2156.25MHz
Operating temperature-20°C~70°C
Height0.035\" (0.90mm)
Size (Dimension)0.197\" L x 0.126\" W (5.00mm x 3.20mm)
OutputHCSL
PackageTape & Reel (TR)
FunctionEnable/Disable
Base resonatorMEMS
Case20-VFQFN Exposed Pad

Product details

MEMS XO with dual HCSL outputs at 100 MHz and 156.25 MHz

The DSC400-4444Q0023KE2T is a MEMS-based XO (Standard) from Microchip's DSC400 series, delivering two fixed output frequencies: 100 MHz on Output 1 and 156.25 MHz on Output 2, both in HCSL logic levels. It operates from a 2.25V to 3.6V supply, covering both 2.5V and 3.3V rails without an external regulator, and includes an enable/disable function for power management.

No official replacement or successor has been issued; the DSC400 series continues as the current-generation MEMS clock generator family from Microchip.

20-VFQFN package and board integration

Housed in a 20-VFQFN exposed-pad package measuring 5.00 mm x 3.20 mm with a seated height of 0.90 mm, the DSC400-4444Q0023KE2T requires a thermal pad on the PCB for heat dissipation and mechanical stability.

Frequently asked questions

What is the output type of DSC400-4444Q0023KE2T?

The output is HCSL (High-Speed Current Steering Logic), a differential standard commonly used for PCIe and other high-speed clock distribution.

Does DSC400-4444Q0023KE2T have an enable/disable function?

Yes, it includes an enable/disable function, allowing the outputs to be tri-stated for power savings or system-level clock gating.