Quad-output MEMS XO for clock-tree consolidation
This DSC400-4134Q0050KE1 is a MEMS-based XO (Standard) that delivers four independent clock outputs from a single 20-VFQFN package — 100 MHz, 125 MHz, 50 MHz, and 100 MHz — in HCSL, LVCMOS, or LVDS format. A single device replaces up to four discrete oscillators, saving board space and reducing BOM line count.
Frequency plan and stability budget
The four fixed outputs are factory-programmed: Output 1 at 100 MHz, Output 2 at 125 MHz, Output 3 at 50 MHz, Output 4 at 100 MHz. Frequency stability is ±50 ppm across the -20°C to 70°C commercial temperature range, which is adequate for 1 GbE, PCIe Gen 2/3 reference clocks, and most FPGA transceiver banks that expect ±100 ppm or better.
Supply voltage and output compatibility
Operates from a single 2.25 V to 3.6 V supply rail, covering 2.5 V and 3.3 V logic families without an external regulator. The output can be configured as HCSL (for PCIe clocks), LVDS (for differential routing), or LVCMOS (for single-ended fan-out) — the same device serves multiple interface standards.
Housed in a 20-VFQFN with exposed pad (5.00 mm x 3.20 mm, 0.90 mm height).
Sourcing status and procurement posture
Microchip Technology supplies the DSC400 series.