MEMS XO with quad HCSL/LVDS outputs
It delivers four fixed-frequency outputs: two at 125 MHz and two at 100 MHz, each configurable as HCSL or LVDS signaling. The ±50 ppm frequency stability over the -20°C to +70°C commercial range is adequate for most PCIe Gen 1/2/3 reference clocks and standard Ethernet PHY XTAL inputs, but a tighter stability (±25 ppm or better) is needed for SyncE or IEEE 1588 PTP grandmaster clocks. Supply voltage spans 2.25 V to 3.6 V, covering both 2.5 V and 3.3 V rails without an intermediate regulator — one less BOM line for the power tree.
Package, layout, and thermal pad
The 20-VFQFN with exposed pad measures 5.00 mm x 3.20 mm and stands 0.90 mm tall.
