MEMS-based XO with four LVDS clock outputs
Output frequencies span video and datacom rates: 148.35 MHz and 148.5 MHz (common for broadcast video), 156.25 MHz (10GbE reference), 208.333333 MHz (FPGA transceiver clock), and 197.8/198 MHz (networking/SerDes).
Operates from 2.25 V to 3.6 V, covering both 2.5 V and 3.3 V rails without an external regulator — the Enable/Disable function lets the system gate the outputs for power sequencing or test modes.
Housed in a 20-VFQFN with exposed pad (5.00 mm x 3.20 mm, 0.90 mm height) — the thermal pad should be soldered to a ground-plane island for heat sinking and to keep the MEMS resonator's frequency stable under airflow.