Quad-output MEMS oscillator for clock-tree consolidation
The DSC400-3333Q0094KE1T delivers four independent LVDS clock outputs from a single 20-VFQFN package: 125 MHz on output 1, 100 MHz on outputs 2 and 3, and 50 MHz on output 4 — enough to drive a multi-rail FPGA or SerDes reference without separate oscillators for each lane.
Supply range, stability, and enable function
Supply voltage spans 2.25 V to 3.6 V, covering common 2.5 V and 3.3 V rails without an external LDO.
Microchip continues to manufacture the DSC400 family. The 20-VFQFN with exposed pad measures 5.00 mm × 3.20 mm with a 0.90 mm seated height.