Four 80 MHz LVDS lanes from a single MEMS die
The DSC400-3333Q0093KE2 delivers four independent 80 MHz LVDS clock outputs from one MEMS resonator — no external crystal or oscillator bank needed. Each lane runs at the same frequency, which suits fan-out clock distribution to multiple FPGAs, ASICs, or SerDes transceivers on the same board. LVDS output provides low-jitter differential signalling with common-mode rejection, reducing EMI coupling in dense digital backplanes. The enable/disable function lets each output be gated independently for power savings during idle states.
Operating from 2.25 V to 3.6 V, the oscillator spans 2.5 V and 3.3 V logic rails without a separate regulator — one less part on the BOM.
Housed in a 20-VFQFN with exposed pad, 5.00 mm x 3.20 mm footprint, 0.90 mm height. The 0.50 mm pitch QFN demands a solder-paste stencil with adequate aperture ratio; a 4-layer board with a solid ground slug under the pad is the standard layout.
The DSC400 series is Microchip's current MEMS oscillator family, so new designs can commit without a last-time-buy risk.