Active MEMS oscillator with four clock outputs
It delivers four independent clock outputs: one at 16 MHz and three at 50 MHz, each configurable as LVCMOS or LVDS. The supply voltage spans 2.25 V to 3.6 V, covering 2.5 V and 3.3 V logic rails without an extra regulator.
Frequency plan and output standard
Output 1 is fixed at 16 MHz — a common reference for USB, Ethernet PHYs, or MCU main clocks. Outputs 2, 3, and 4 are all 50 MHz, suitable for high-speed serial interfaces or FPGA fabric clocks. The LVDS option gives you differential signalling with low jitter for longer PCB traces.
The 20-VFQFN exposed-pad package measures 5.00 mm × 3.20 mm with a seated height of 0.90 mm.