Quad-output MEMS oscillator for multi-clock BOM consolidation
It delivers four independent output frequencies: 148.35 MHz and 148.5 MHz on output 1, 156.25 MHz on output 2, 25 MHz on output 3, and 197.8 MHz with 198 MHz on output 4. Each output can be configured as LVCMOS or LVDS, giving the designer flexibility to drive both single-ended and differential clock domains from one device. The Enable/Disable function allows unused outputs to be gated off for power savings during idle modes.
Frequency stability is ±25 ppm across the full temperature range, which keeps the clock edge jitter within the timing budget for 148.5 MHz video links and 156.25 MHz Ethernet reference clocks.
Package, supply voltage, and PCB layout notes
Housed in a 20-VFQFN with exposed pad (5.00 mm x 3.20 mm, 0.90 mm height), the device requires a thermal via array under the pad for proper heat dissipation and electrical grounding. The supply voltage range of 2.25 V to 3.6 V covers common 2.5 V and 3.3 V rails without an external regulator.
Active production, no last-time-buy concern
The product status is Active.
