Quad-output MEMS oscillator for mixed-clock domains
Output 1 provides 148.35 MHz and 148.5 MHz (selectable), Output 2 is 156.25 MHz, Output 3 is 25 MHz, and Output 4 provides 197.8 MHz and 198 MHz (selectable). This frequency set directly serves video pixel clocks (148.5 MHz), 10GbE reference (156.25 MHz), system/management clock (25 MHz), and high-speed serial data rates (197.8/198 MHz) from one oscillator. Outputs are configurable as LVCMOS or LVDS, allowing the same device to drive both single-ended logic and differential pairs without a level translator. The Enable/Disable function lets firmware gate unused outputs to reduce system power.
Operating from 2.25 V to 3.6 V, the oscillator covers 2.5 V and 3.3 V logic rails without an additional regulator.
Housed in a 20-VFQFN exposed pad package measuring 5.00 mm x 3.20 mm with a 0.90 mm seated height.
Product status is Active per Microchip's current lifecycle designation.