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Microchip Technology DSC400-3133Q0080KI2 — Crystals & Oscillators

DSC400-3133Q0080KI2 MEMS XO – Quad Output, ±25 ppm

MPNDSC400-3133Q0080KI2
Active

Microchip DSC400-3133Q0080KI2, XO (Standard), MEMS base, quad output 148.35 MHz / 27 MHz / 25 MHz / 148.35 MHz, LVCMOS and LVDS, ±25 ppm stability, -40 to +85 °C, 20-VFQFN exposed pad.

Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

DSC400-3133Q0080KI2 specifications
ParameterValue
TypeXO (Standard)
SeriesDSC400
Voltage2.25V ~ 3.6V
Frequency stability±25ppm
Frequency - output 1148.35MHz
Frequency - output 227MHz
Frequency - output 325MHz
Frequency - output 4148.35MHz
Operating temperature-40°C~85°C
Height0.035\" (0.90mm)
Size (Dimension)0.197\" L x 0.126\" W (5.00mm x 3.20mm)
OutputLVCMOS, LVDS
PackageTube
FunctionEnable/Disable
Base resonatorMEMS
Case20-VFQFN Exposed Pad

Product details

Quad-output MEMS oscillator replaces four XOs on the BOM

The DSC400-3133Q0080KI2 packs four independent clock outputs into a single 20-VFQFN package: two at 148.35 MHz, one at 27 MHz, and one at 25 MHz. That means one oscillator footprint and one supply rail doing the job of four discrete XOs — a direct BOM consolidation play for boards that need multiple reference clocks. Outputs are configurable as LVCMOS or LVDS, so the same part can drive a SerDes reference on one lane and a logic clock on another without a level translator.

This holds the timing margin for 1000BASE-T, PCIe Gen 2, or USB 3.0 PHY reference clocks even when the board ambient hits 85 °C in a sealed enclosure. The MEMS resonator avoids the aging and shock sensitivity of a quartz crystal — the stability spec is maintained over the device lifetime without a calibration cycle.

Supply voltage spans 2.25 V to 3.6 V, so the oscillator runs directly from a 2.5 V or 3.3 V rail without a dedicated LDO. The wide tolerance also absorbs ripple from a noisy bus without losing lock.

The 20-VFQFN with exposed pad measures 5.00 mm x 3.20 mm, 0.90 mm tall — a standard quad-flat-pack footprint that reflows with a typical JEDEC profile and does not require via-in-pad unless the thermal pad demands it.

Frequently asked questions

What is the frequency stability of the DSC400-3133Q0080KI2?

±25 ppm over the full -40 to +85 °C operating range. This is the total frequency tolerance including initial accuracy, temperature drift, and supply variation — no external trim capacitor or TCXO needed.

What is the enable/disable logic for the DSC400-3133Q0080KI2?

The part has an Enable/Disable function. When the enable pin is asserted, all four outputs are active; when de-asserted, the outputs go into a high-impedance state. The exact logic level thresholds are in the datasheet.