Four-output MEMS XO for clock-tree consolidation
Outputs are independently configurable as HCSL or LVCMOS, covering both high-speed differential clocking (e.g., PCIe reference) and single-ended logic-level distribution without external level translation.
Supply range and enable/disable control
Operates from 2.25 V to 3.6 V, covering 2.5 V and 3.3 V rails commonly found in networking and industrial designs — no separate regulator needed when sharing a 2.5 V or 3.3 V plane. An Enable/Disable function allows the outputs to be tri-stated for system power-down or test modes without removing supply voltage.