Four-output MEMS XO for clock-tree consolidation
Each output can be independently configured as HCSL or LVCMOS, which lets the same oscillator feed both a PCIe reference clock (HCSL) and a system-logic clock (LVCMOS) without a separate level translator.
Supply range, stability, and enable function
Operating from 2.25 V to 3.6 V, this part covers the common 2.5 V and 3.3 V logic rails without an external regulator — a single supply rail serves all four outputs.
Housed in a 5.00 mm x 3.20 mm, 0.90 mm tall 20-VFQFN with an exposed pad, the package requires a thermal via pattern under the pad for the datasheet-recommended RthJA — a standard 4-layer board with a solid ground plane under the pad is the baseline. Supplied in tape and reel, the DSC400-1444Q0060KE2T is compatible with automated pick-and-place and reflow assembly without special handling beyond standard MSL precautions.