Four-output MEMS oscillator for clock-tree consolidation
The DSC400-1133Q0113KI1 packs four independent clock outputs into a single 5.00 mm x 3.20 mm 20-VFQFN package — 100 MHz, 156.25 MHz, 125 MHz (two copies), and 25 MHz — replacing up to four discrete oscillators and their associated decoupling capacitors. Outputs are configurable as LVCMOS or LVDS per the DSC400 family architecture, letting a single device feed both a SerDes reference (LVDS) and a logic clock (LVCMOS) without a level translator.
Supply flexibility and enable/disable control
Operates from 2.25 V to 3.6 V, covering both 2.5 V and 3.3 V rails without an external regulator — the wide input range absorbs rail tolerance in mixed-voltage systems.
