Active MEMS XO – three 100MHz HCSL lanes
Frequency stability is ±25ppm over the -20°C to +70°C commercial temperature range, which keeps the 100MHz HCSL edge placement within 250 ps of ideal across temperature — adequate for PCIe Gen1/2 reference clocks and high-speed serial links that budget 50-100 ppm total error. Supply voltage spans 2.25V to 3.6V, so the part runs directly off a 2.5V or 3.3V rail without an external LDO, and the enable/disable pin lets the system gate the outputs during low-power standby without cycling the main supply.
The 20-VFQFN exposed pad (5.00mm x 3.20mm body, 0.90mm height) requires a thermal via array under the paddle to conduct heat to the ground plane — without it, the junction temperature rises above the 70°C ambient ceiling during continuous HCSL switching. HCSL outputs are differential and require external 50-ohm termination to ground at the receiver per the HCSL standard — the oscillator itself does not include on-die termination, so the PCB layout must place the resistors within 0.5 inch of the load pins to maintain signal integrity at 100MHz.