Dual HCSL clock source for PCIe and Ethernet reference
The DSC400-0404Q0007KE1T is a MEMS-based XO (Standard) that generates two fixed HCSL output frequencies: 100 MHz on output 1 and 156.25 MHz on output 2. These frequencies match the reference clock requirements for PCIe Gen1/2/3 and 10/25 GbE SerDes, making it a direct-fit clock source for a switch, router, or FPGA-based line card.
Stability and supply tolerance for serial-link timing
For a 100 MHz reference, ±50 ppm translates to a ±5 kHz absolute frequency error — well within the ±100 ppm capture range of a standard PCIe receiver PLL. The supply voltage range of 2.25 V to 3.6 V covers 2.5 V and 3.3 V rails commonly found on networking ASICs and FPGAs. The wide input tolerance means the oscillator can share a rail with the core logic without a dedicated LDO.
Housed in a 20-VFQFN with exposed pad, 5.00 mm x 3.20 mm body, 0.90 mm height.
