Two output frequencies, one clean clock IC
The DSC400-0401Q0103KI1 delivers two independent clock outputs: 12.288 MHz and 100 MHz, selectable between HCSL and LVCMOS logic families. The 12.288 MHz output is a common telecom framing rate (/T1) while the 100 MHz output suits a high-speed SerDes reference or FPGA fabric clock — a single oscillator covering both domains saves a crystal slot and a buffer.
Industrial temperature range and stability
Wide supply and small footprint
The 2.25V to 3.6V supply range lets the oscillator run directly off a 2.5V or 3.3V rail without an extra regulator. The 20-VFQFN exposed-pad package (5.00 mm × 3.20 mm, 0.90 mm height) keeps the board footprint compact; the exposed pad needs a thermal via pattern under the device for proper solder-joint reliability and heat dissipation.