MEMS oscillator with dual 156.25 MHz HCSL outputs
That dual-output architecture lets it clock two PCIe lanes or two Ethernet PHYs from one package, saving a second oscillator socket on the board. HCSL (High-Speed Current Steering Logic) is the native swing for PCIe reference clocks — no external level translation needed. Typical supply current is 60 mA max with both outputs active.
Package and footprint for 156.25 MHz routing
Housed in a 14-VFQFN Exposed Pad measuring 3.20 mm x 2.50 mm with a 0.90 mm seated height.
