Dual 156.25 MHz – PCIe and Ethernet reference clock
The DSC2044FI2-H0001B delivers two identical 156.25 MHz HCSL outputs from a single MEMS resonator — the exact frequency used as the reference clock for PCIe Gen 3/4, 10GBASE-KR, and 25GBASE-CR interfaces. Both outputs run at the same frequency, so a single oscillator can clock the MAC and the PHY on separate lanes without a fanout buffer.
±25 ppm stability over industrial temperature
Frequency stability is ±25 ppm total across the -40°C to 85°C range, supply variation from 2.25 V to 3.6 V, and aging — no external trim capacitors or VCXO control loop needed. For a 156.25 MHz clock, ±25 ppm equals ±3.9 kHz of absolute frequency error, well within the ±100 ppm tolerance of a standard Ethernet PHY. The 60 mA typical supply current covers both output drivers; the disable mode drops it to 23 mA for sleep states.
14-VFQFN – layout and thermal management
The 14-lead VFQFN with exposed pad measures 3.20 mm × 2.50 mm (0.126" × 0.098") and stands 0.90 mm tall. The 0.50 mm pitch fan-out is manageable on a 2-layer board if the ground paddle vias are placed under the package.
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