Dual-output LVDS clock in a 3.2x2.5 mm footprint
Each output can be independently set to 100 MHz, 125 MHz, 156.25 MHz, or 312.5 MHz, covering common Ethernet, PCIe, and SerDes reference frequencies.
Frequency stability is ±25 ppm across the full temperature and voltage range, which keeps the clock edge jitter within the budget for 10/100/1000BASE-T Ethernet and 6 Gbps SerDes links.
