Dual-output MEMS XO for multi-frequency timing
Output 1 supports 24, 25, 27, 48, 50, or 54 MHz; Output 2 adds 125 MHz to that set. This lets a single oscillator feed two clock domains — say a 25 MHz reference for the Ethernet PHY and a 50 MHz core clock — without a second crystal or PLL. That holds the clock edge jitter tight enough for 100BASE-TX and USB 2.0 without an external clean-up PLL.
Housed in a 14-VFQFN exposed pad package measuring 3.20 mm x 2.50 mm with a height of 0.90 mm.
