Dual-frequency MEMS oscillator for Ethernet and packet-switch timing
The LVCMOS output and enable/disable function let the host processor gate the clock during low-power sleep modes, pulling the supply current down from 35 mA to 23 mA max.
Package and layout — 14-VFQFN with exposed pad
Temperature stability and operating range
The ±25 ppm window covers the full temperature range and includes initial tolerance, temperature drift, and aging; a 155.52 MHz clock with ±25 ppm jitter contributes roughly 160 ps of period jitter at the output.