100 MHz HCSL clock for PCIe and serial links
This DSC1124NI1-100.0000 is a 100 MHz MEMS-based XO with HCSL output — the differential current-mode logic that PCIe Gen1/2/3 reference clocks and many 100 MHz SERDES interfaces expect. The HCSL swing (typically 700–900 mV peak-to-peak into 50 Ω to ground) drives a point-to-point clock tree without external termination resistors on each trace, which simplifies the layout on a dense server or switch board.
The 2.25V to 3.6V supply range covers 2.5V and 3.3V rails with margin — no extra LDO needed if the rail droops under load.
The 6-SMD no-lead package (7.0 mm × 5.0 mm, 0.90 mm seated height) is a common footprint shared with many 7×5 mm oscillators, so a board layout designed for a quartz XO in the same form factor can accept this MEMS part with no spin.