100 MHz HCSL clock for PCIe and SERDES reference
The DSC1124DI1-100.0000 is a fixed-frequency 100 MHz XO with HCSL output — the signal type used for PCIe reference clocks and high-speed SERDES interfaces.
Supply voltage tolerance and power rail fit
The 2.25V to 3.6V supply range means this oscillator runs from a 2.5V or 3.3V rail without an intermediate LDO — the internal regulator handles the drop. Maximum supply current is 42 mA when enabled; disabling the output via the Enable/Disable pin drops it to 22 mA max.
Package and board layout note
The 6-SMD no-lead package measures 2.50 mm x 2.00 mm with a seated height of 0.90 mm — a compact footprint that fits tight PCIe add-in-card or module layouts. No lead forming is needed; the solder pads are on the bottom face. The Enable/Disable pin is active-low; if unused, tie it to Vdd or leave it floating (internal pull-up is typical, but confirm in the datasheet).