156.2422 MHz HCSL clock for high-speed serial links
The DSC1124CI5-156.2422: The HCSL swing (typically 700-900 mV peak-to-peak into 50 Ω to ground) is a differential pair that keeps common-mode noise off the reference trace, which matters when the clock fans out to multiple PLLs on a dense board. The ±10 ppm frequency stability holds the long-term drift tight enough for most Ethernet and PCIe Gen1/2/3 applications without a separate VCXO or PLL cleanup loop.
MEMS resonator vs quartz — the reliability trade-off
The base resonator is MEMS, not a quartz crystal. MEMS oscillators survive higher mechanical shock (typically 50,000 g vs 1,000-2,000 g for quartz) and have no start-up reliability issues from crystal aging or drive-level sensitivity. For a board that sees vibration — a fan-cooled chassis, a telecom outdoor enclosure, or a portable instrument dropped during handling — the MEMS construction eliminates the crystal's failure mode of cracked blank or activity dips over temperature. On a board with eight such clocks, that saves 160 mA during sleep states without a separate clock buffer with OE.