MEMS oscillator for high-speed reference clocks
The DSC1124BI2-125.0000T is a MEMS-based XO (Standard) delivering a fixed 125 MHz output in HCSL logic levels — the signalling standard for PCIe Gen3, 10GbE, and many FPGA reference clock inputs. HCSL (High-Speed Current Steering Logic) swings 700–900 mV peak-to-peak into a 50-Ω terminated differential pair, which means the same oscillator can drive both the FPGA refclk and the PCIe root complex without a level translator.
Supply range and enable/disable control
Operates from 2.25V to 3.6V — a single 3.3V or 2.5V rail covers the whole range, so no secondary LDO is needed when the core logic runs at 2.5V and the transceiver bank at 3.3V.
Temperature range and stability budget
Rated -40°C to 85°C with ±25 ppm total frequency stability — the MEMS resonator's low g-sensitivity keeps the ppm in spec under vibration, unlike a quartz crystal that would drift 10–20 ppm under 5 g random vibration. This stability band is tight enough for a 125 MHz SerDes reference clock without external VCXO or PLL cleanup — the jitter contribution from the oscillator itself stays within the SerDes tolerance budget.
6-SMD no-lead package, 5.00mm × 3.20mm body, 0.90mm seated height — the 0.90mm profile fits under a mezzanine card or heatsink overhang without clearance issues. Surface-mount with no leads means the PCB footprint uses edge castellations; recommended pad layout is identical to standard 5.0×3.2 mm quartz oscillators, so this MEMS part drops into an existing quartz footprint without a board spin.