100 MHz HCSL clock source for PCIe and SerDes reference
The DSC1124AI1-100.0000 is a 100 MHz XO (Standard) oscillator with HCSL output, designed to serve as a low-jitter reference clock for PCIe Gen1/2/3, Ethernet, and SerDes interfaces. The HCSL (High-Speed Current Steering Logic) output provides a differential signal with a typical 700 mV swing into a 50-ohm termination, matching the input requirements of most clock buffers and PHYs without external level translation.
The 2.25V to 3.6V supply range lets the oscillator operate from a 2.5V or 3.3V rail without an extra regulator, simplifying the power tree.
No direct replacement or successor is listed; the part is the current offering in the DSC1124 series.