148.5 MHz LVDS clock for video and broadcast
The DSC1123NL1-148.5000T is a MEMS-based XO delivering a 148.5 MHz LVDS output — the standard pixel clock for 1080p60 video and common in broadcast infrastructure, test equipment, and high-resolution displays. LVDS differential signalling rejects common-mode noise on long PCB traces, making this oscillator a clean fit for mixed-signal boards where a switching regulator or digital bus runs near the clock line.
The 2.25 V to 3.63 V supply range covers both 2.5 V and 3.3 V logic rails — one BOM line serves either without a local LDO.
6-VDFN package and board layout
Housed in a 6-VDFN package measuring 7.00 mm x 5.00 mm with a seated height of 0.90 mm, the footprint fits compact designs but requires a solder-paste stencil with fine apertures for the thermal pad.
