250 MHz LVDS clock for harsh environments
The DSC1123DL2-250.0000T is a 250 MHz MEMS-based oscillator with LVDS output, built for applications that need a clean, high-frequency clock in tough conditions. The LVDS signalling keeps jitter low over long board traces, which matters when the clock is feeding a high-speed ADC, FPGA, or SerDes transceiver. The ±25 ppm stability holds the timing budget across that temperature swing.
This is a common requirement in mixed-voltage systems where the FPGA core runs at 2.5 V and the I/O bank at 3.3 V. The 0.90 mm seated height keeps it low-profile for tight card cages.