It delivers a standard XO function with an Enable/Disable control pin, drawing 32 mA max from a 2.25V to 3.63V supply.
AEC-Q100 qualification and package footprint
The 6-SMD, no-lead package measures 2.50mm x 2.00mm with a seated height of 0.90mm — a compact footprint that fits tight PCB layouts in camera modules or radar sensor boards. The LVDS output provides differential signaling with low EMI, which simplifies layout in mixed-signal designs where clock noise couples into analog front-ends.
MEMS vs quartz: what the stability spec means for your BOM
For a 200 MHz LVDS clock feeding a SerDes or FPGA, this translates to a worst-case timing error of roughly 5 ps at the receiver — well within the setup-and-hold margin of most automotive-grade FPGAs and Ethernet PHYs. Unlike a quartz oscillator, the MEMS resonator does not require a load capacitor or external feedback resistor, reducing BOM count by two passives per clock tree.
