MEMS oscillator for noise-sensitive clock trees
The DSC1123DI2-050.0000: LVDS output pairs directly with FPGA clock inputs, high-speed ADCs, and SERDES reference pins — the differential signalling rejects common-mode noise that a single-ended CMOS oscillator would couple into the supply plane. Supply voltage spans 2.25 V to 3.63 V, so it runs off a 3.3 V or 2.5 V rail without a separate regulator, and draws 32 mA max — light enough that a shared rail with other digital loads won't sag under the oscillator's transient.
Housed in a 6-SMD, No Lead package measuring 2.50 mm x 2.00 mm with a seated height of 0.90 mm — a compact footprint that fits tight channel spacing on a multi-gigabit backplane or a sensor interface card. Surface-mount, no-lead package: the pads are on the bottom, so the hot-air nozzle needs to heat the whole body evenly. A preheat plate at 150°C helps avoid thermal shock to the MEMS die.
No direct replacement or successor has been announced; the DSC1123 series continues as the primary offering for this frequency and output type.