333.33 MHz LVDS clock for high-speed interfaces
The DSC1123CI2-333.3300T delivers a 333.33 MHz LVDS output from a MEMS resonator — a frequency that directly clocks 10 GbE PHYs, FPGA transceiver reference inputs, or SERDES framers without an external PLL.
MEMS vs quartz — what the resonator means for the BOM
The DSC1123CI2-333.3300T draws 32 mA max from a 2.25 V to 3.63 V supply, and the enable/disable pin pulls the output to high-impedance while dropping supply current to 22 mA — useful for power-gating the clock tree in a system that sleeps between bursts. MEMS oscillators typically survive 50 000 g shock and 70 g vibration, a step up from quartz for equipment that ships or operates in high-vibration environments.
Package and board layout notes
The 6-SMD no-lead package measures 3.20 mm x 2.50 mm with a seated height of 0.90 mm max. The enable pin is active-high; leave it pulled high through a 10 kΩ resistor if the function is unused.