100 MHz LVDS clock source with automotive qualification
The LVDS output pairs directly with high-speed serial interfaces (PCIe, SATA, Ethernet PHY reference clocks) where the differential swing keeps noise off the clock trace.
Enable/disable pin and power budget
That 10 mA saving per clock tree adds up in battery-backed or thermally constrained enclosures.
Housed in a 6-SMD no-lead exposed-pad package measuring 7.00 mm × 5.00 mm, 0.90 mm seated height.
