106.25 MHz LVPECL clock source — what it replaces
The DSC1122DI2-106.2500: A standard quartz-based 106.25 MHz oscillator with LVPECL output can be replaced by this MEMS XO without a board spin — same 6-SMD footprint, same 2.5V or 3.3V supply rail, same enable/disable function. The MEMS resonator eliminates quartz start-up time and vibration sensitivity, which matters for a 106.25 MHz reference feeding a 10GbE PHY or FPGA transceiver bank.
Supply voltage and output level fit
The 2.25V to 3.6V supply range covers both 2.5V and 3.3V LVPECL logic families without a separate regulator. At 3.3V the LVPECL swing is 800 mV typical, compatible with AC-coupled 100-Ohm differential lines into a CML or LVPECL receiver. The 58 mA max supply current at 106.25 MHz is the full-load figure — actual draw is lower with the output terminated into 50 Ohms to VTT.
Temperature grade and frequency stability
The stability includes initial tolerance, temperature drift, and aging over 10 years. For a 106.25 MHz reference, ±25 ppm translates to ±2.66 kHz absolute error, well within the capture range of a typical Ethernet PHY CDR.