48.002 MHz LVPECL reference — where it fits in the clock tree
The DSC1122CE5-048.0020 is a MEMS-based XO (Standard) oscillator delivering a 48.002 MHz LVPECL output — a differential signal that drives the reference clock of a SerDes, FPGA gigabit transceiver, or 10G Ethernet PHY without the single-ended-to-differential conversion loss a CMOS oscillator would need. The ±10 ppm frequency stability holds the timing budget for most 1 GbE and CPRI links; a ±25 ppm part would risk bit errors over temperature and aging, so this grade is the right fit for a link that must run at the line rate without retraining.
Active production — no end-of-life scramble
It is orderable today and supported for new designs — no last-time-buy window to track, no successor migration to plan.
Package and supply — what the board sees
6-SMD no-lead package, 3.20 mm x 2.50 mm footprint, 0.90 mm seated height. Operating temperature range -20°C to 70°C covers indoor equipment and most outdoor telecom cabinets with passive cooling; for an engine-bay or downhole application, a wider-temperature variant from the DSC1122 family would be needed.