148.5 MHz LVPECL MEMS clock — sourcing and fit
The DSC1122BI2-148.5000 is a MEMS-based XO (Standard) delivering a 148.5 MHz LVPECL output — a common reference frequency for 3G-SDI video, 10GbE line cards, and FPGA transceiver banks that need a clean differential clock.
Supply and output — what the rails and swing mean for the board
Supply range 2.25 V to 3.6 V covers both 2.5 V and 3.3 V rails; the wide tolerance means the oscillator starts cleanly even if the rail ramps slowly or droops under load. LVPECL output draws 58 mA max — the dominant current is the output stage, not the MEMS core.
Package and layout — 6-SMD no-lead, 5.0×3.2 mm
6-SMD no-lead package, 5.00×3.20 mm footprint, 0.90 mm seated height. Standard land pattern for 5×3.2 mm oscillators; the four corner pads are the supply and output, the two centre pads are NC or enable — verify the enable polarity against the DSC1122 pinout.