The DSC1122AI1-125.0000T: The LVPECL signal swing is well-suited for driving clock inputs on high-speed ADCs, FPGAs, and SERDES transceivers where the differential pair rejects common-mode noise on the board.
Package and supply voltage range
Housed in a 6-SMD, No Lead Exposed Pad package measuring 7.00 mm x 5.00 mm with a seated height of 0.90 mm, the oscillator fits standard 7x5 mm clock footprints.
