Why LVPECL at 78.125 MHz matters for your clock tree
The DSC1122AI1-078.1250: This MEMS oscillator delivers a LVPECL output at 78.125 MHz — the differential signalling keeps jitter low over board traces longer than a few inches, which is why you see it on 10GbE PHY reference clocks and FPGA transceiver banks. The MEMS resonator means no quartz crystal to crack under vibration; startup is typically under 5 ms, so the PHY locks before the link negotiation completes.
The supply voltage spans 2.25V to 3.6V, so it runs from a 3.3V or 2.5V rail without an extra LDO — one less component to qualify.
Listed as Active by Microchip. You can design this into a new BOM today and expect multi-year supply without a respin.
Package and enable/disable for board-level control
Housed in a 6-SMD, No Lead Exposed Pad package — 7.00mm x 5.00mm footprint, 0.90mm seated height. On a rework bench, the exposed pad makes hot-air removal straightforward — preheat the board to 120°C, then hit the pad with 280°C airflow until the part lifts clean.