100 MHz HCSL clock for PCIe and SERDES
The DSC1104CL1-100.0000T delivers a 100 MHz HCSL output from a MEMS resonator — the standard reference for PCIe Gen1/2/3 root complexes and switches. HCSL is a differential, current-mode logic that drives a 50-Ω terminated line directly; no external bias resistors or AC-coupling caps are needed on the clock lane. The wide tolerance covers the typical ±5 % and ±10 % rails found on production boards.
Standby power-down for battery-backed systems
This matters for a line-powered device that must survive a brief mains dropout — the oscillator shuts off and the downstream PLL holds lock during the glitch.
Active lifecycle — order for new designs
Product status is Active. Supplied in Tape & Reel (TR) — 3.20 mm x 2.50 mm, 0.90 mm seated height, 6-SMD no-lead package.