171.8181 MHz LVDS clock source — where it fits
The DSC1103DI5-171.8181T: This is a MEMS-based XO (Standard) that outputs a 171.8181 MHz LVDS clock from a 2.25V–3.63V supply rail. The LVDS signalling gives you differential edge rates with common-mode rejection — useful when the clock trace runs more than a few inches across a noisy board or through a backplane connector.
In a system that sleeps most of the time — a remote sensor or a battery-backed controller — that disable current is low enough to ignore in the sleep budget. Active current draw is 32 mA max at 171.8181 MHz. The LVDS output is internally terminated, so you do not need external bias resistors on the receiver side.
6-SMD, No Lead package measuring 2.50mm x 2.00mm with a seated height of 0.90mm max. The no-lead land pattern means the solder fillet is under the package — verify the PCB pad geometry against the recommended land pattern in the datasheet.