400 MHz LVDS clock source — MEMS, not quartz
Output is LVDS, the differential signalling standard that keeps jitter low over short PCB traces to an FPGA or SerDes transceiver. The 400 MHz carrier suits 10G Ethernet reference clocks, PCIe Gen 3/4 reference clocks, and high-speed ADC sampling clocks.
Supply range and standby — power tree fit
Supply voltage spans 2.25V to 3.63V, covering both 2.5V and 3.3V rails without a dedicated regulator.
6-SMD no-lead — footprint and assembly
Housed in a 6-SMD, No Lead package measuring 2.50 mm x 2.00 mm with a seated height of 0.90 mm. Surface-mount only — no through-hole variant. The small footprint frees board space but demands a fine-pitch stencil and a reflow profile compatible with the MEMS die's peak temperature rating (typically 260°C, confirm in the datasheet).
Active lifecycle — no design-in risk
No minimum order quantity restrictions beyond standard reel or tube quantities.