MEMS oscillator with LVDS output at 166 MHz
The DSC1103CI2-166.0000: LVDS signalling provides low-jitter, differential clock distribution for high-speed interfaces such as Ethernet PHYs, FPGAs, and SerDes transceivers — the 100-ohm termination is built into the receiver, so no external bias network is needed.
Active current draw is 32 mA max at 166 MHz — the MEMS resonator core keeps the power lower than a comparable quartz-based oscillator at this frequency.
The 6-SMD no-lead package measures 3.20 mm x 2.50 mm with a seated height of 0.90 mm — a compact footprint that matches standard 3.2 x 2.5 mm oscillator land patterns, simplifying PCB layout reuse.