125 MHz LVDS clock source for high-speed serial links
The DSC1103BI2-125.0000T is a 125 MHz XO with LVDS output and ±25 ppm frequency stability — a clean reference clock for 1 Gigabit Ethernet, PCIe Gen 1/2, or SFP+ modules where the PLL on the PHY expects a low-jitter source.
This suits battery-operated or duty-cycled equipment where the clock tree must be gated without an external load-switch. Supply voltage spans 2.25V to 3.63V, so the same part number works on a 2.5V or 3.3V rail without a separate regulator — one BOM line covers both voltage domains.
Industrial temperature envelope and package footprint
The 6-SMD no-lead package (5.00mm x 3.20mm, 0.90mm seated height) is a common 6-pin XO footprint — the same land pattern used by many quartz oscillators, so a board already routed for a 6-pin 5x3.2mm XO can accept this MEMS part without a layout change.