162 MHz LVPECL MEMS oscillator for industrial clock trees
The DSC1102DI5-162.0000T: The LVPECL signal swings fast and clean into a 50-Ω terminated line — this is the clock source for a SerDes reference, a high-speed ADC sampling clock, or a FPGA transceiver lane where edge jitter budget is tight.
Availability confirmed at RFQ.
