25 MHz LVPECL clock source with MEMS resonator
The LVPECL output delivers the fast edge rates and low jitter that 1 Gbps serial links and FPGA reference clocks require — but the 58 mA max supply current means the power rail must be sized for the output stage, not just the core.
Supply range and frequency stability
The 2.25V to 3.6V supply range covers 2.5V and 3.3V rails without a separate regulator — a single LDO feeding the oscillator rail is sufficient.
