150 MHz LVPECL clock for high-speed signal chains
LVPECL output levels are specified for driving 50-Ω terminated transmission lines directly, making this a fit for clocking high-speed ADCs, FPGAs, and SerDes transceivers that require a low-jitter differential reference.
MEMS resonator advantage over quartz
Supply voltage spans 2.25V to 3.6V, so the same part number works across 2.5V and 3.3V rails without a separate voltage variant.
Standby power-down for duty-cycled systems
Active supply current is 58 mA maximum at 150 MHz, typical for a differential LVPECL output at this frequency.
Package and board layout notes
Housed in a 6-SMD no-lead package measuring 3.20 mm × 2.50 mm with a seated height of 0.90 mm, the footprint is compact enough for dense line cards and matches the industry-standard 3.2×2.5 mm oscillator pad layout.